{"type":"rich","version":1.0,"title":"ChiselV simulation on Verilator with UART","width":2883,"html":"<a href=\"https://asciinema.org/a/448039\" target=\"_blank\"><img src=\"https://asciinema.org/a/448039.png\" alt=\"ChiselV simulation on Verilator with UART\" width=\"2883\"></a>","height":1720,"author_name":"carlosedp","author_url":"https://asciinema.org/~carlosedp","provider_name":"asciinema","provider_url":"https://asciinema.org/","thumbnail_height":1720,"thumbnail_url":"https://asciinema.org/a/448039.png","thumbnail_width":2883}